//
// Generated by Bluespec Compiler
//
//
// Ports:
// Name                         I/O  size props
// cmsb                           O    16
// cmsb_din                       I    25
//
// Combinational paths from inputs to outputs:
//   cmsb_din -> cmsb
//
//

`ifdef BSV_ASSIGNMENT_DELAY
`else
  `define BSV_ASSIGNMENT_DELAY
`endif

`ifdef BSV_POSITIVE_RESET
  `define BSV_RESET_VALUE 1'b1
  `define BSV_RESET_EDGE posedge
`else
  `define BSV_RESET_VALUE 1'b0
  `define BSV_RESET_EDGE negedge
`endif

module module_cmsb(cmsb_din,
		   cmsb);
  // value method cmsb
  input  [24 : 0] cmsb_din;
  output [15 : 0] cmsb;

  // signals for module outputs
  wire [15 : 0] cmsb;

  // value method cmsb
  assign cmsb =
	     cmsb_din[24] ?
	       16'd25 :
	       (cmsb_din[23] ?
		  16'd24 :
		  (cmsb_din[22] ?
		     16'd23 :
		     (cmsb_din[21] ?
			16'd22 :
			(cmsb_din[20] ?
			   16'd21 :
			   (cmsb_din[19] ?
			      16'd20 :
			      (cmsb_din[18] ?
				 16'd19 :
				 (cmsb_din[17] ?
				    16'd18 :
				    (cmsb_din[16] ?
				       16'd17 :
				       (cmsb_din[15] ?
					  16'd16 :
					  (cmsb_din[14] ?
					     16'd15 :
					     (cmsb_din[13] ?
						16'd14 :
						(cmsb_din[12] ?
						   16'd13 :
						   (cmsb_din[11] ?
						      16'd12 :
						      (cmsb_din[10] ?
							 16'd11 :
							 (cmsb_din[9] ?
							    16'd10 :
							    (cmsb_din[8] ?
							       16'd9 :
							       (cmsb_din[7] ?
								  16'd8 :
								  (cmsb_din[6] ?
								     16'd7 :
								     (cmsb_din[5] ?
									16'd6 :
									(cmsb_din[4] ?
									   16'd5 :
									   (cmsb_din[3] ?
									      16'd4 :
									      (cmsb_din[2] ?
										 16'd3 :
										 (cmsb_din[1] ?
										    16'd2 :
										    16'd0))))))))))))))))))))))) ;
endmodule  // module_cmsb