Cycle Number:   0, Writing Data:   0
Cycle Number:   1, Writing Data:   1
Cycle Number =   2, Value read =   0
Cycle Number =   3, Value read =   1
Cycle Number:   3, Writing Data:   2
Cycle Number =   4, Value read =   2
Cycle Number:   4, Writing Data:   3
Cycle Number =   5, Value read =   3
Cycle Number:   5, Writing Data:   4
Cycle Number =   6, Value read =   4
Cycle Number:   6, Writing Data:   5
Cycle Number =   7, Value read =   5
Cycle Number:   7, Writing Data:   6
Cycle Number =   8, Value read =   6
Cycle Number:   8, Writing Data:   7
Cycle Number =   9, Value read =   7
Cycle Number:   9, Writing Data:   8
Cycle Number =  10, Value read =   8
Cycle Number:  10, Writing Data:   9
Cycle Number =  11, Value read =   9
Cycle Number:  11, Writing Data:  10
Cycle Number =  12, Value read =  10
Cycle Number:  12, Writing Data:  11
Cycle Number =  13, Value read =  11
Cycle Number:  13, Writing Data:  12
Cycle Number =  14, Value read =  12
Cycle Number:  14, Writing Data:  13
Cycle Number =  15, Value read =  13
Cycle Number:  15, Writing Data:  14
Cycle Number =  16, Value read =  14
Cycle Number:  16, Writing Data:  15
Cycle Number =  17, Value read =  15
Cycle Number:  17, Writing Data:  16
Cycle Number =  18, Value read =  16
Cycle Number:  18, Writing Data:  17
Cycle Number =  19, Value read =  17
Cycle Number:  19, Writing Data:  18
Simulation Passes
Final state:
main.top.the_tx_datafifo_f_0 =  0x12
main.top.the_tx_datafifo_f_1 =  0x12
main.top.in_data = 0x13
main.top.out_data = 0x12
main.top.counter = 0x14
main.top.fail = False