=== Generated schedule for mkPipelineFIFO_Bit32 ===

Method schedule
---------------
Method: enq
Ready signal: ! rv.port1__read[32]
Sequenced before (restricted): clear
Sequenced after (restricted): deq, first
Conflicts: enq
 
Method: deq
Ready signal: rv.port0__read[32]
Sequenced before (restricted): enq, clear
Sequenced after: first
Conflicts: deq
 
Method: first
Ready signal: rv.port0__read[32]
Conflict-free: first
Sequenced before: deq
Sequenced before (restricted): enq, clear
 
Method: clear
Ready signal: True
Sequenced before (restricted): clear
Sequenced after (restricted): enq, deq, first
 
Logical execution order: first, deq, enq, clear

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