$date
	Fri Mar 12 11:23:53 2010
$end
$version
	Bluespec VCD dumper 2.1
$end
$timescale
	1 us
$end
$scope module main $end
$scope module top $end
$var reg 1 ! CLK $end
$var reg 1 " scemi_uclkgen$CLK_OUT $end
$var reg 1 # scemi_clk1_port_clkgen$CLK_OUT $end
$var reg 1 ! CLK $end
$var reg 1 $ CAN_FIRE_RL_scemi_clock_gens_counters_do_stall $end
$var reg 1 % CAN_FIRE_RL_scemi_clock_gens_counters_incr $end
$var reg 1 & CAN_FIRE_RL_scemi_clock_gens_do_stall_scemi $end
$var reg 1 ' CAN_FIRE_RL_scemi_clock_gens_manage_reset $end
$var reg 1 ( CAN_FIRE_RL_scemi_clock_gens_tick_clock $end
$var reg 1 ) CAN_FIRE_RL_scemi_detect_shutdown $end
$var reg 1 * CAN_FIRE_RL_scemi_handle_reset $end
$var reg 1 + CAN_FIRE_RL_scemi_incr_cycle_stamp $end
$var reg 1 , CAN_FIRE_RL_scemi_init_state_crossed_stamp_clock_domain_crossing $end
$var reg 1 - CAN_FIRE_RL_scemi_one_to_one_cclock_incr $end
$var reg 1 . CAN_FIRE_RL_scemi_shutdown_ack $end
$var reg 1 / CAN_FIRE_RL_scemi_shutdown_ctrl_in_dataF_rule_deq $end
$var reg 1 0 CAN_FIRE_RL_scemi_shutdown_ctrl_in_dataF_rule_enq $end
$var reg 1 1 CAN_FIRE_RL_scemi_shutdown_ctrl_in_do_request $end
$var reg 1 2 CAN_FIRE_RL_scemi_shutdown_ctrl_in_poll $end
$var reg 1 3 CAN_FIRE_RL_scemi_shutdown_ctrl_in_receive $end
$var reg 1 4 CAN_FIRE_RL_scemi_shutdown_ctrl_in_receive_ready $end
$var reg 1 5 CAN_FIRE_RL_scemi_shutdown_ctrl_in_req_detect_update $end
$var reg 1 6 CAN_FIRE_RL_scemi_shutdown_ctrl_in_requestF_rule_update_final $end
$var reg 1 7 CAN_FIRE_RL_scemi_shutdown_ctrl_out_check_buffer $end
$var reg 1 8 CAN_FIRE_RL_scemi_shutdown_request $end
$var reg 1 9 CAN_FIRE_RL_scemi_shutdown_shutdown $end
$var reg 1 : CAN_FIRE_RL_scemi_stall_one_to_one_cclock $end
$var reg 1 ; CAN_FIRE_RL_scemi_toggle_uclock $end
$var reg 1 < CAN_FIRE_RL_scemi_track_reset $end
$var reg 1 = NOT_scemi_clock_gens_counters_stall_pw_whas__1___d62 $end
$var reg 1 > RST_N $end
$var reg 1 ? TASK_bscemi_is_buffer_available___d43 $end
$var reg 1 @ TASK_bscemi_is_data_available___d123 $end
$var reg 1 A TASK_bscemi_recv___d18 $end
$var reg 1 B TASK_bscemi_shutdown_triggered___d104 $end
$var reg 1 C WILL_FIRE_RL_scemi_clock_gens_counters_do_stall $end
$var reg 1 D WILL_FIRE_RL_scemi_clock_gens_counters_incr $end
$var reg 1 E WILL_FIRE_RL_scemi_clock_gens_do_stall_scemi $end
$var reg 1 F WILL_FIRE_RL_scemi_clock_gens_manage_reset $end
$var reg 1 G WILL_FIRE_RL_scemi_clock_gens_tick_clock $end
$var reg 1 H WILL_FIRE_RL_scemi_detect_shutdown $end
$var reg 1 I WILL_FIRE_RL_scemi_handle_reset $end
$var reg 1 J WILL_FIRE_RL_scemi_incr_cycle_stamp $end
$var reg 1 K WILL_FIRE_RL_scemi_init_state_crossed_stamp_clock_domain_crossing $end
$var reg 1 L WILL_FIRE_RL_scemi_one_to_one_cclock_incr $end
$var reg 1 M WILL_FIRE_RL_scemi_shutdown_ack $end
$var reg 1 N WILL_FIRE_RL_scemi_shutdown_ctrl_in_dataF_rule_deq $end
$var reg 1 O WILL_FIRE_RL_scemi_shutdown_ctrl_in_dataF_rule_enq $end
$var reg 1 P WILL_FIRE_RL_scemi_shutdown_ctrl_in_do_request $end
$var reg 1 Q WILL_FIRE_RL_scemi_shutdown_ctrl_in_poll $end
$var reg 1 R WILL_FIRE_RL_scemi_shutdown_ctrl_in_receive $end
$var reg 1 S WILL_FIRE_RL_scemi_shutdown_ctrl_in_receive_ready $end
$var reg 1 T WILL_FIRE_RL_scemi_shutdown_ctrl_in_req_detect_update $end
$var reg 1 U WILL_FIRE_RL_scemi_shutdown_ctrl_in_requestF_rule_update_final $end
$var reg 1 V WILL_FIRE_RL_scemi_shutdown_ctrl_out_check_buffer $end
$var reg 1 W WILL_FIRE_RL_scemi_shutdown_request $end
$var reg 1 X WILL_FIRE_RL_scemi_shutdown_shutdown $end
$var reg 1 Y WILL_FIRE_RL_scemi_stall_one_to_one_cclock $end
$var reg 1 Z WILL_FIRE_RL_scemi_toggle_uclock $end
$var reg 1 [ WILL_FIRE_RL_scemi_track_reset $end
$var reg 32 \ b__h3907 $end
$var reg 64 ] b__h493 $end
$var reg 32 ^ b__h5548 $end
$var reg 32 _ b__h7042 $end
$var reg 32 ` b__h7529 $end
$var reg 32 a b__h8316 $end
$var reg 1 b scemi_clk1_port_rstgen$OUT_RST_N $end
$var reg 1 c scemi_clock_gens_counters_count__read__3_EQ_0___d115 $end
$var reg 1 d scemi_clock_gens_counters_count__read__3_EQ_1___d114 $end
$var reg 1 e scemi_clock_gens_in_reset_pw_whas____d111 $end
$var reg 1 f scemi_clock_gens_out_of_reset_reg__h7543 $end
$var reg 1 g scemi_rstgen$OUT_RST_N $end
$var reg 1 h scemi_shutdown_ctrl_in_dataF_rw_enq_wget____d105 $end
$var reg 1 i scemi_shutdown_ctrl_in_dataF_rw_enq_whas____d106 $end
$var reg 1 j scemi_shutdown_ctrl_in_dataF_taggedReg_2_BIT_0___d120 $end
$var reg 1 k scemi_shutdown_ctrl_in_dataF_taggedReg_2_BIT_1___d113 $end
$var reg 2 l scemi_shutdown_ctrl_in_dataF_taggedReg___d112 $end
$var reg 1 m scemi_shutdown_ctrl_in_req_detect_inRequest__h3763 $end
$var reg 1 n scemi_shutdown_ctrl_in_requestF_rw_enq_whas____d121 $end
$scope module scemi_clk1_port_clkgen $end
$var reg 1 # CLK_OUT $end
$var reg 1 "6 CLK_GATE_OUT $end
$var reg 1 "7 CLK_VAL_OUT $end
$upscope $end
$scope module scemi_clk1_port_rstgen $end
$var reg 1 "8 rst $end
$upscope $end
$scope module scemi_clock_gens_counters_count $end
$var reg 1 "9 dLatch $end
$var reg 1 ": sSyncReg $end
$upscope $end
$var reg 1 "; scemi_clock_gens_counters_stall_pw $end
$var reg 1 "< scemi_clock_gens_in_reset_pw $end
$var reg 1 "= scemi_clock_gens_out_of_reset_reg $end
$var reg 32 "> scemi_clock_gens_reset_counter $end
$var reg 1 "? scemi_clock_gens_stall_pw $end
$var reg 1 "@ scemi_clock_gens_stalled $end
$var reg 1 "A scemi_free_stamp $end
$var reg 1 "B scemi_init_state_any_in_reset $end
$var reg 64 "C scemi_init_state_crossed_stamp $end
$var reg 64 "D scemi_init_state_cycle_stamp $end
$scope module scemi_init_state_msgFIFO $end
$var reg 1 " CLK $end
$var reg 1 "E RST_N $end
$var reg 1 "F FULL_N $end
$var reg 1 "G EMPTY_N $end
$var reg 1 "H ENQ $end
$var reg 74 "I D_IN $end
$var reg 1 "J DEQ $end
$var reg 1 "K CLR $end
$var reg 74 "L D_OUT $end
$var reg 74 "L arr_0 $end
$var reg 74 "M arr_1 $end
$var reg 74 "N arr_2 $end
$var reg 74 "O arr_3 $end
$upscope $end
$var reg 10 "P scemi_init_state_out_port $end
$scope module scemi_one_to_one_cclock_count $end
$var reg 1 "Q dLatch $end
$var reg 1 "R sSyncReg $end
$upscope $end
$var reg 1 "S scemi_one_to_one_cclock_stall_pw $end
$var reg 1 "T scemi_rising_uclock_pw $end
$scope module scemi_rstgen $end
$var reg 1 "U rst $end
$upscope $end
$var reg 1 "V scemi_shutdown_ctrl_in_dataF_pw_deq $end
$var reg 1 "W scemi_shutdown_ctrl_in_dataF_rw_enq $end
$var reg 2 "X scemi_shutdown_ctrl_in_dataF_taggedReg $end
$var reg 1 "Y scemi_shutdown_ctrl_in_data_available $end
$var reg 32 "Z scemi_shutdown_ctrl_in_index $end
$var reg 1 "[ scemi_shutdown_ctrl_in_req_detect_ack_wire $end
$var reg 1 "\ scemi_shutdown_ctrl_in_req_detect_edge_wire $end
$var reg 1 "] scemi_shutdown_ctrl_in_req_detect_inRequest $end
$var reg 1 "^ scemi_shutdown_ctrl_in_req_detect_send_wire $end
$var reg 1 "_ scemi_shutdown_ctrl_in_requestF_pw_deq $end
$var reg 1 "` scemi_shutdown_ctrl_in_requestF_rw_enq $end
$var reg 1 "a scemi_shutdown_ctrl_in_requestF_taggedReg $end
$var reg 1 "b scemi_shutdown_ctrl_in_the_data $end
$var reg 32 "c scemi_shutdown_ctrl_out_index $end
$var reg 1 "d scemi_shutdown_ctrl_out_space_available $end
$var reg 1 "e scemi_shutdown_shutdown_pending $end
$scope module scemi_uclkgen $end
$var reg 1 " CLK_OUT $end
$var reg 1 "f CLK_GATE_OUT $end
$var reg 1 "g CLK_VAL_OUT $end
$upscope $end
$scope module scemi_clk1_port_param_clockGroup $end
$var reg 1 "h CAN_FIRE_not_used $end
$var reg 1 "i RDY_not_used $end
$var reg 1 "j not_used $end
$upscope $end
$scope module scemi_clk1_port_param_clockNum $end
$var reg 1 "k CAN_FIRE_not_used $end
$var reg 1 "l RDY_not_used $end
$var reg 1 "m not_used $end
$upscope $end
$scope module scemi_clk1_port_param_dutyHi $end
$var reg 1 "n CAN_FIRE_not_used $end
$var reg 1 "o RDY_not_used $end
$var reg 1 "p not_used $end
$upscope $end
$scope module scemi_clk1_port_param_dutyLo $end
$var reg 1 "q CAN_FIRE_not_used $end
$var reg 1 "r RDY_not_used $end
$var reg 1 "s not_used $end
$upscope $end
$scope module scemi_clk1_port_param_link_type $end
$var reg 1 "t CAN_FIRE_not_used $end
$var reg 1 "u RDY_not_used $end
$var reg 1 "v not_used $end
$upscope $end
$scope module scemi_clk1_port_param_phase $end
$var reg 1 "w CAN_FIRE_not_used $end
$var reg 1 "x RDY_not_used $end
$var reg 1 "y not_used $end
$upscope $end
$scope module scemi_clk1_port_param_ratioDen $end
$var reg 1 "z CAN_FIRE_not_used $end
$var reg 1 "{ RDY_not_used $end
$var reg 1 "| not_used $end
$upscope $end
$scope module scemi_clk1_port_param_ratioNum $end
$var reg 1 "} CAN_FIRE_not_used $end
$var reg 1 "~ RDY_not_used $end
$var reg 1 #! not_used $end
$upscope $end
$scope module scemi_clk1_port_param_rstStage $end
$var reg 1 #" CAN_FIRE_not_used $end
$var reg 1 ## RDY_not_used $end
$var reg 1 #$ not_used $end
$upscope $end
$scope module scemi_param_link_type $end
$var reg 1 #% CAN_FIRE_not_used $end
$var reg 1 #& RDY_not_used $end
$var reg 1 #' not_used $end
$upscope $end
$scope module scemi_shutdown_ctrl_in_param_link_type $end
$var reg 1 #( CAN_FIRE_not_used $end
$var reg 1 #) RDY_not_used $end
$var reg 1 #* not_used $end
$upscope $end
$scope module scemi_shutdown_ctrl_out_param_link_type $end
$var reg 1 #+ CAN_FIRE_not_used $end
$var reg 1 #, RDY_not_used $end
$var reg 1 #- not_used $end
$upscope $end
$upscope $end
$upscope $end
$enddefinitions $end
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