checking package dependencies
compiling MethodValue_ConcatTwoReg.bsv
code generation for sysMethodValue_ConcatTwoReg starts
=== IOproperties:
Name                         I/O  size props
m                              O    16 reg
RDY_m                          O     1 const
CLK                            I     1 clock
RST_N                          I     1 reset


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Verilog file created: sysMethodValue_ConcatTwoReg.v
All packages are up to date.