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author | Julie Schwartz <quark@bluespec.com> | 2021-07-28 13:01:16 +1200 |
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committer | GitHub <noreply@github.com> | 2021-07-28 13:01:16 +1200 |
commit | 613d3dc318d47c8f43ce9b06855b414e9292e6d4 (patch) | |
tree | 48582a3ef5799bca3274b1cc6d04946554595979 | |
parent | cfd1402470e89fea926a79102bfaaf6add46d4dc (diff) | |
download | bsc-613d3dc318d47c8f43ce9b06855b414e9292e6d4.tar.gz bsc-613d3dc318d47c8f43ce9b06855b414e9292e6d4.tar.bz2 bsc-613d3dc318d47c8f43ce9b06855b414e9292e6d4.zip |
Update README with renaming of the 'check' target
-rw-r--r-- | INSTALL.md | 6 |
1 files changed, 3 insertions, 3 deletions
@@ -129,7 +129,7 @@ generate two source files. It also needs flex and bison: $ apt-get install flex bison -The `check` target runs a test using an external Verilog simulator, which is +The `check-smoke` target runs a test using an external Verilog simulator, which is [Icarus Verilog] by default. You can install Icarus on Debian/Ubuntu with: $ apt-get install iverilog @@ -165,7 +165,7 @@ the submodules later with a separate command: At the root of the repository: $ make install - $ make check + $ make check-smoke This will create a directory called `inst` containing an installation of the compiler toolchain. It will then run a smoke test to ensure the compiler and @@ -191,7 +191,7 @@ in the `testsuite` subdirectory. ### Choosing a Verilog simulator The Makefile in `examples/smoke_test` shows how you can point the default -`check` target at other Verilog simulators such as VCS and VCSI (Synopys), +`check-smoke` target at other Verilog simulators such as VCS and VCSI (Synopys), NC-Verilog & NCsim (Cadence), ModelSim (Mentor), and CVC. Many people also use [Verilator][] to compile and simulate `bsc`-generated |